Achieving Automation in Chip Design Verification, Boosting Development Efficiency by Over 10 Times, 'Zhiwei Chuangxin' Completes Angel Round Financing of Tens of Millions of Yuan | 36Kr Exclusive
As the semiconductor industry charges forward amid AI frenzy, one of the most fundamental yet headache-inducing stages has become the tightest and most fragile link in the entire industry chain: chip verification. The first-time tape-out success rate can be as low as 14%, and verifying a single module consumes nearly two months of engineering work—these aren't sensational claims, but the harsh reality of the industry. Now, Zhiwei Chuangxin steps in with ChatDV, "the world's first large-model AI
Analysis
The spotlight of capital markets is almost entirely focused on chip manufacturing and AI computing power, as if building factories faster and stacking more computing power could solve all problems. But the reality is that design complexity is increasing exponentially, while verification remains the "slowest sailor" dragging the entire ship forward. It is highly experience-dependent, repetitive, and tedious—like a desperate arms race where engineers constantly write test cases to keep up with the complexity of chip designs. Traditional EDA tools are precise rulers, but they don’t think; general-purpose large models are knowledgeable chatbots, but they don’t understand the "grammar" and "hidden rules" of chips. What the industry needs is a seasoned craftsman who speaks the jargon and can roll up their sleeves to get the job done.
Zhiwei Chuangxin’s entry point is exactly this verification stage, which industry giants consider a "non-core profit area" yet everyone complains about. Based on publicly available information, their approach is pragmatic: rather than building a grand, all-encompassing platform, they focus on four of the most frequent and time-consuming pain points—test generation, assertion generation, reference model construction, and debugging. This "scalpel-like" precision is far more reliable than grand narratives claiming to do everything. Their "AI large model + data flywheel" logic also holds: AI generates initial content, simulation tools verify correctness, and results are fed back into the model for learning. This creates a closed loop that theoretically becomes more accurate with use.
However, the biggest challenge has never been the technical concept, but the real-world data barrier. Verification code and test platforms are among the core intellectual properties of chip companies and cannot be made public. Public datasets are like textbook exercises—far removed from real industrial-level complexity. Wang Xi said, "Data is the real moat," a statement that is half confident, half resigned. How Zhiwei Chuangxin acquires or generates enough "dirty" and realistic training data will directly determine whether ChatDV becomes a powerful tool for solving real problems or just a demo spinning idly on simple modules. Backed by the EDA National Innovation Center and universities, they may gain access to data from some national projects within regulatory frameworks, but bridging the trust gap with broad commercial client data remains a challenge.
From a commercialization perspective, they have wisely chosen to partner with companies like CEC, X-EPIC, and Thundersoft. These firms have verification needs and a degree of technical openness, making them ideal pilot scenarios. Their multiple business models—including licenses, integrated machines, and design services—aim to cover clients of different scales. However, it’s crucial to recognize that when integrating AI tools deeply into rigorous chip design workflows, clients’ primary concern is not whether it can work, but whether they dare to trust it. A single misjudgment leading to a tape-out failure can result in losses of tens of millions. Therefore, while ChatDV’s 89% automatic repair rate and several-fold improvement in accuracy are impressive, its reliability and explainability under extreme conditions will be key to convincing chip giants to pay. They need to understand why the model offers a particular recommendation, not just that it provides one.
Wang Xi’s team boasts an impressive background, combining academic origins with engineering capabilities. The Turing Award lab heritage and support from national platforms give the company a strong starting point and technical credibility. But this is also a double-edged sword. Academic DNA often pursues technical perfection, whereas the chip business world prioritizes stability, control, and risk aversion. Balancing cutting-edge exploration with engineering reliability is a challenge every team transitioning from academia to the market must face.
Their ultimate vision— "one-click chip generation," or even "chip AGI"—is extremely ambitious and exciting. But the current ChatDV is more like a solid foundationstone. Moving from module-level verification automation to IP-level and then subsystem-level is a long road. They claim to have discovered unknown bugs in classic RISC-V processors, which is undoubtedly a strong proof of concept. But chip design is a tightly interconnected systematic engineering effort. The coordination between front-end verification tools and back-end physical design tools, as well as alignment with foundry processes, still requires a long journey. Zhiwei Chuangxin states that it complements traditional EDA vendors, which is wise. However, will boundaries remain clear in the future? When the verification agent becomes powerful enough, might it encroach into the domains of design or synthesis?
Overall, Zhiwei Chuangxin has pinpointed a real and acute pain point in the semiconductor industry. Their technical roadmap is logical, and the team is capable. But they are attempting to introduce a highly innovative, data-intelligence-dependent variable into an industry that is deeply conservative and risk-averse. This requires time, patience, and above all, a few successful and scalable commercial cases to break the industry’s wait-and-see mindset. The "handicraft workshop" era of chip verification may indeed be coming to an end, but whether AI can become the key to unlocking automation—rather than just another complex module needing endless verification—will be answered by the market with its characteristic ruthlessness and fairness. The fuse of this efficiency revolution has just been lit.
Disclaimer: The above content is generated by AI and is for reference only.