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NVIDIA HORIZON: A Hands-Free Agent that Evolves Git Worktrees and Hits 100% RTL Benchmark Completion NVIDIA HORIZON:一个无需动手的代理,可演进Git工作树并实现100% RTL基准测试完成

NVIDIA Research introduces HORIZON, a hands-free agentic framework that treats hardware design as repository-level code evolution using isolated Git worktrees. The system achieves a 100% pass rate across all evaluated RTL benchmark suites (ChipBench, RTLLM-2.0, Verilog-Eval, and CVDP) by leveraging iterative self-correction. HORIZON utilizes a structured Markdown harness to define goals, evaluators, and acceptance predicates, compiling them into a self-contained agent loop that commits only upon NVIDIA Research推出HORIZON框架,将硬件设计视为版本控制的代码演进过程,实现全自动化RTL设计。 该框架通过结构化Markdown规范驱动智能体循环,仅在通过可执行验收门控时才提交Git版本。 在ChipBench、RTLLM-2.0等基准测试中,HORIZON实现了100%的任务完成率,证明了其有效性。 利用Git工作树作为状态存储和经验缓冲区,结合会话复用技术降低推理成本,无需训练强化学习策略。

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Impact 影响力

Analysis 深度分析

TL;DR

  • NVIDIA Research introduces HORIZON, a hands-free agentic framework that treats hardware design as repository-level code evolution using isolated Git worktrees.
  • The system achieves a 100% pass rate across all evaluated RTL benchmark suites (ChipBench, RTLLM-2.0, Verilog-Eval, and CVDP) by leveraging iterative self-correction.
  • HORIZON utilizes a structured Markdown harness to define goals, evaluators, and acceptance predicates, compiling them into a self-contained agent loop that commits only upon passing executable gates.
  • The framework demonstrates significant variance in convergence speed, ranging from 2 iterations for simple tasks to 82 iterations for complex code completion, highlighting the computational cost of iterative refinement.

Why It Matters

This development marks a critical shift from single-turn code generation to iterative, autonomous engineering workflows for hardware description languages (HDLs). By proving that agentic systems can achieve 100% success rates on complex RTL benchmarks through continuous self-evaluation, it validates the feasibility of fully automated hardware design pipelines. This reduces the manual burden on engineers and establishes a new standard for reliability in AI-assisted chip design.

Technical Details

  • Repository-Level Evolution: HORIZON manages designs as version-controlled Git repositories rather than static files. Each iteration involves planning, editing the worktree, invoking tools (compilation, simulation, coverage), and committing only if an executable acceptance predicate passes.
  • Structured Harness & Project Pack: Input is defined via a Markdown harness containing goals, domain knowledge, evaluator specs, and acceptance predicates. A bootstrap agent compiles this into a project pack $p = (\pi_{agent}, E_p, A_p, \Gamma_p, \Omega_p)$, defining the agent policy, evaluator, acceptance predicate, version-control policy, and domain skills.
  • Git as Experience Buffer: The system uses native Git commands to trace trajectories. Successful commits serve as positive repair examples, while rejected attempts are logged as negative examples. The repository history acts as the experience buffer, eliminating the need for separate datastores.
  • Fixed Backbone & Cost Optimization: Experiments use a fixed GPT-5.3 backbone without reinforcement learning updates. Token costs are minimized by maintaining persistent model sessions and leveraging prompt caching for stable sources, billing only for diffs and evaluator outputs.
  • Benchmark Performance: Evaluated on ChipBench, RTLLM-2.0, Verilog-Eval, and CVDP (783 problems). While first-iteration pass rates vary (e.g., 3.2% for RTL code completion vs. 86.2% for Verilog-Eval), all suites reach 100% final pass rates after sufficient iterations.

Industry Insight

  • Adoption of Iterative Agentic Workflows: Hardware design teams should anticipate a move toward multi-step, self-correcting AI agents rather than one-shot generation tools. Integrating Git-based version control into AI workflows becomes essential for tracking and validating these iterative improvements.
  • Resource Planning for Long-Tail Tasks: The wide variance in convergence iterations (from 2 to 82) indicates that certain design tasks, like code completion or checker generation, will incur significantly higher computational costs. Organizations must budget for extended inference times and token usage for complex verification tasks.
  • Standardization of Acceptance Predicates: The success of HORIZON relies heavily on precise, executable acceptance criteria. Developing robust, automated verification suites (simulators, linters, coverage tools) is now a prerequisite for effectively deploying agentic AI in hardware engineering.

TL;DR

  • NVIDIA Research推出HORIZON框架,将硬件设计视为版本控制的代码演进过程,实现全自动化RTL设计。
  • 该框架通过结构化Markdown规范驱动智能体循环,仅在通过可执行验收门控时才提交Git版本。
  • 在ChipBench、RTLLM-2.0等基准测试中,HORIZON实现了100%的任务完成率,证明了其有效性。
  • 利用Git工作树作为状态存储和经验缓冲区,结合会话复用技术降低推理成本,无需训练强化学习策略。

为什么值得看

HORIZON展示了AI从单纯生成代码向自主解决复杂工程问题演进的关键一步,特别是在硬件设计这一高门槛领域实现了“无人值守”的自动化闭环。对于AI从业者和硬件工程师而言,它揭示了如何将传统EDA流程与LLM代理能力深度结合,为未来更复杂的系统级自动设计提供了新的范式参考。

技术解析

  • 核心架构:HORIZON将每个设计问题托管为版本控制仓库,输入仅为包含目标、领域知识、评估规范和验收谓词的结构化Markdown Harness。启动代理将其编译为项目包,随后进入无人类干预的自包含代理循环。
  • Git作为状态基底:Git不仅是版本控制工具,更是智能体的经验缓冲区和状态载体。每次迭代通过git diff检查变更,通过git commit记录通过验证的版本,并将成功/失败案例作为正负样本存储在仓库历史中,无需额外数据存储。
  • 评估与验收机制:针对RTL设计,评估器集成编译、仿真、覆盖率提取及断言/测试台检查。只有当可执行的验收谓词(Acceptance Predicate)通过时,智能体才会提交新版本,确保生成的Verilog代码具备正确的周期级行为和电气特性。
  • 性能与基准:基于固定骨干模型GPT-5.3,在AMD EPYC 9334服务器上运行。在多个基准套件(如ChipBench, CVDP)中均达到100%通过率。首次迭代通过率为47.8%,复杂任务(如代码补全)可能需要多达82次迭代收敛,但长期收益显著。
  • 成本优化策略:采用会话复用技术,保持持久模型会话,利用提供商的提示缓存服务稳定的Harness和项目包,仅对当前差异和最新评估输出计费,从而大幅降低Token消耗。

行业启示

  • 硬件设计自动化新范式:传统的单轮代码生成无法满足硬件设计的复杂性要求,HORIZON证明的“迭代式自我修正+可执行验证”模式是解决高可靠性工程问题的有效路径,可能重塑EDA工具链。
  • Agent系统的工程化落地:通过将Git工作流深度集成到Agent循环中,HORIZON提供了一种低成本、可追溯的Agent状态管理方案,为其他需要长期记忆和复杂状态管理的Agent应用提供了架构借鉴。
  • 从软件到硬件的泛化潜力:虽然目前聚焦于RTL,但其“定义问题-执行评估-迭代修正”的核心逻辑具有通用性,预示着AI在科学计算、算法发现等其他需要严格形式化验证领域的广泛应用前景。

Disclaimer: The above content is generated by AI and is for reference only. 免责声明:以上内容由 AI 生成,仅供参考。

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