Self-Developed High-Performance Distributed Solution, XinXiao Technology Shortens Chip Power Sign-off Cycle from Weeks to Days 自研高性能分布式解决方案，「芯晓科技」将芯片电源签核周期从几周缩短至几天

Summary

Xinxiao Technology launches its first digital power signoff tool, IcPower, which uses distributed matrix solving technology to reduce the power signoff cycle from weeks to days.
IcPower supports advanced processes such as 7nm, handles chips with tens of billions of gates, and achieves 4.5–8.5× faster performance on typical test cases compared to tools from foreign industry leaders. It has already been deployed at multiple domestic chip manufacturers.
The core technological breakthrough lies in a graph theory–based intelligent partitioning algorithm and distributed matrix solver optimization, ensuring strict consistency between distributed computing results and single-machine high-precision solver results.
The company achieved revenues of several million yuan in 2025 and plans to raise funds in the second half of 2026 from industrial investors. Its product roadmap will expand into thermal analysis and stress analysis.
Xinxiao Technology is exploring the application of AI agents in chip design, with the goal of building an AI-driven chip design platform that can integrate with other EDA tools.

Deep Analysis

TL;DR

• Xinxiao Technology launches its first digital power signoff tool, IcPower, which uses distributed matrix solving technology to reduce the power signoff cycle from weeks to days.
• IcPower supports advanced processes such as 7nm, handles chips with tens of billions of gates, and achieves 4.5–8.5× faster performance on typical test cases compared to tools from foreign industry leaders. It has already been deployed at multiple domestic chip manufacturers.
• The core technological breakthrough lies in a graph theory–based intelligent partitioning algorithm and distributed matrix solver optimization, ensuring strict consistency between distributed computing results and single-machine high-precision solver results.
• The company achieved revenues of several million yuan in 2025 and plans to raise funds in the second half of 2026 from industrial investors. Its product roadmap will expand into thermal analysis and stress analysis.
• Xinxiao Technology is exploring the application of AI agents in chip design, with the goal of building an AI-driven chip design platform that can integrate with other EDA tools.

Why It's Worth Reading

Xinxiao Technology's IcPower tool addresses the efficiency bottleneck in the "last mile" of power signoff in chip design, delivering direct value in shortening chip delivery cycles and reducing tape-out risks. Its distributed matrix solving technology provides a viable path for domestic EDA tools to achieve leapfrog advancement in advanced process nodes, carrying strategic significance for the autonomy and controllability of China's chip industry chain.

Technical Analysis

• Distributed Matrix Solving Technology: Based on the "domain decomposition method" from computational mathematics, this technology splits the enormous sparse matrix of power grid signoff (with dimensions reaching hundreds of millions) into multiple sub-matrices, which are solved in parallel across multiple computers to reduce computation time. The core challenge lies in the scientific rigor of the algorithm partitioning and communication optimization in a distributed environment.
• Intelligent Partitioning Algorithm: Leveraging the characteristics of sparse matrices in power networks, a graph theory–based intelligent partitioning algorithm is employed to scientifically divide the tens-of-billions-scale global matrix into multiple sub-matrices, minimizing boundary coupling between sub-matrices and improving parallel computing efficiency.
• Distributed Solver Optimization: The communication topology and message-passing mechanisms between nodes are optimized to significantly reduce network communication overhead in distributed environments. Strict numerical stability control algorithms are introduced to ensure that distributed computing results achieve mathematical-grade strict consistency with single-machine high-precision solver results.
• Performance: Speed improvements of 3–5× over foreign tools, with dynamic analysis test cases achieving over 10× improvement. Supports advanced processes such as 7nm, meeting the power signoff needs of chips with tens of billions of gates.
• Product Roadmap: Thermal analysis and stress analysis products will be launched in the second half of 2026, supporting complete electro-thermal coupled analysis to address heat generation and thermal stress issues caused by 3DIC chip stacking. The company is also exploring AI agent applications, enabling design tasks to be completed through natural language tool invocation.

Industry Insights

• Window for Domestic EDA Substitution: The global EDA market is dominated by three giants—Synopsys, Cadence, and Siemens EDA (approximately 74% market share). The US-China tech rivalry is driving domestic chip manufacturers to adopt domestic tools as alternatives or backups, creating a strategic opportunity for startups like Xinxiao Technology.
• Paradigm Shift in Chip Design: As Moore's Law approaches its physical limits, the chip industry is shifting from process node scaling to vertical stacking (3DIC). The scale of power signoff analysis is growing exponentially, placing higher demands on the computational efficiency and accuracy of EDA tools. Accumulated underlying technology has become a core competitive advantage.
• Commercialization Challenges and Path: Customers have concerns about the supply continuity of startup companies, making customer acquisition a current challenge. The software licensing model features fixed R&D costs and increasing profitability as the customer base grows. The company needs to accelerate market expansion through industrial investor financing while pricing competitively against foreign tools based on performance confidence.